کد مقاله | کد نشریه | سال انتشار | مقاله انگلیسی | نسخه تمام متن |
---|---|---|---|---|
11023878 | 1701239 | 2018 | 7 صفحه PDF | دانلود رایگان |
عنوان انگلیسی مقاله ISI
Row decoder for embedded Phase Change Memory using low voltage transistors
ترجمه فارسی عنوان
ردیف رمز برای تغییر تعویض فاز تغییر حافظه با استفاده از ترانزیستورهای ولتاژ پایین
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کلمات کلیدی
موضوعات مرتبط
مهندسی و علوم پایه
مهندسی کامپیوتر
سخت افزارها و معماری
چکیده انگلیسی
In this paper, a row decoder architecture is discussed, that is designed using low voltage transistors, targeting fast word-line charging. Total Read timings in any memory can be divided into two parts: Word-line (WL) capacitive load charging time and Sense amplifier reaction time. Word-Line charging time is decided by WL-driver, Row-decoder and pre-decoder stages, architecture and type of transistor used in circuits. Here, a Row-decoder architecture (specifically used for Phase Change Memories) is presented that can help in achieving fast WL charging during Read operation and during Modify operation, it can bias WL at high voltage without compromising the reliability. In this architecture, Low voltage transistors are used with separated low voltage and high voltage paths for Memory Read and Modify operations. All devices are operated in their safe operating area (SOA) ensuring reliability of circuit.
ناشر
Database: Elsevier - ScienceDirect (ساینس دایرکت)
Journal: Microelectronics Journal - Volume 81, November 2018, Pages 117-122
Journal: Microelectronics Journal - Volume 81, November 2018, Pages 117-122
نویسندگان
Vikas Rana, Marco Pasotti, Marcella Carissimi,