کد مقاله کد نشریه سال انتشار مقاله انگلیسی نسخه تمام متن
424884 685654 2016 9 صفحه PDF دانلود رایگان
عنوان انگلیسی مقاله ISI
A dynamic execution time estimation model to save energy in heterogeneous multicores running periodic tasks
ترجمه فارسی عنوان
مدل تخمين زمان پویا برای صرفه جويي در انرژی در وظايف دوره ای در حال اجرای چندهسته ای ناهمگن
کلمات کلیدی
معماری چند هسته ای چند هسته ای؛ معماری چند هسته ای قابل پیش بینی؛ زمان آگاهي از بهره وري انرژي؛ ذخیره انرژی؛ سیستم های تعبیه شده در زمان واقعی
موضوعات مرتبط
مهندسی و علوم پایه مهندسی کامپیوتر نظریه محاسباتی و ریاضیات
چکیده انگلیسی


• Accurate estimates of the task execution time help reduce the deadline misses.
• Estimates of the task execution time improve energy savings.
• The model drives the scheduler to adjust DVFS for energy and schedulability.
• The model applies on multicore embedded processors.

Nowadays, real-time embedded applications have to cope with an increasing demand of functionalities, which require increasing processing capabilities. With this aim real-time systems are being implemented on top of high-performance multicore processors that run multithreaded periodic workloads by allocating threads to individual cores. In addition, to improve both performance and energy savings, the industry is introducing new multicore designs such as ARM’s big.LITTLE that include heterogeneous cores in the same package.A key issue to improve energy savings in multicore embedded real-time systems and reduce the number of deadline misses is to accurately estimate the execution time of the tasks considering the supported processor frequencies. Two main aspects make this estimation difficult. First, the running threads compete among them for shared resources. Second, almost all current microprocessors implement Dynamic Voltage and Frequency Scaling (DVFS) regulators to dynamically adjust the voltage/frequency at run-time according to the workload behavior. Existing execution time estimation models rely on off-line analysis or on the assumption that the task execution time scales linearly with the processor frequency, which can bring important deviations since the memory system uses a different power supply.In contrast, this paper proposes the Processor–Memory (Proc–Mem) model, which dynamically predicts the distinct task execution times depending on the implemented processor frequencies. A power-aware EDF (Earliest Deadline First)-based scheduler using the Proc–Mem approach has been evaluated and compared against the same scheduler using a typical Constant Memory Access Time model, namely CMAT. Results on a heterogeneous multicore processor show that the average deviation of Proc–Mem is only by 5.55% with respect to the actual measured execution time, while the average deviation of the CMAT model is 36.42%. These results turn in important energy savings, by 18% on average and up to 31% in some mixes, in comparison to CMAT for a similar number of deadline misses.

ناشر
Database: Elsevier - ScienceDirect (ساینس دایرکت)
Journal: Future Generation Computer Systems - Volume 56, March 2016, Pages 211–219
نویسندگان
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