A Space Vector Pulse Width Modulation Approach for DC Link Voltage Balancing in Diode-Clamped Multilevel Inverter

This paper presents a generalised SVPWM technique –named Nearest Three Vector and Selected Three Vector – (NSTV) to control DC-link imbalances in the three-level NPC-MLI, which is one of the main drawbacks. The proposed scheme is a result of the blend of the techniques Nearest Three Vector (NTV) and Selected Three Vector (STV). This scheme can maintain DC-link voltage within a specified tolerance value with any modulation index or a wide range of load variation. The results of the proposed scheme exhibits DC-link voltage variation within 0.25% which well below the acceptable limit. The scheme guarantees to achieve voltage balancing without any additional control. The benefits of the proposed solution over existing schemes are verified through the MATLAB simulation and tested for the proto type MLI designed with the novel SVPWM implemented in FPGA- SPARTEN III.