کد مقاله کد نشریه سال انتشار مقاله انگلیسی نسخه تمام متن
6873172 1440630 2018 12 صفحه PDF دانلود رایگان
عنوان انگلیسی مقاله ISI
Hardware design and modeling of lightweight block ciphers for secure communications
ترجمه فارسی عنوان
طراحی سخت افزار و مدل سازی سایفرهای بلوک سبک برای ارتباطات امن
موضوعات مرتبط
مهندسی و علوم پایه مهندسی کامپیوتر نظریه محاسباتی و ریاضیات
چکیده انگلیسی
In general, results demonstrate that number of resources and measured power consumption exhibit similar, but not identical, profile against design options. Measured energy trends are more complex. Specifically, results show that employing variable key scheduling increases resources, power and energy by 30%, 42% and 58%, respectively. Further, increasing the block size by 50% increases resources and power by about 53% and 55% respectively, but reduces energy by an average of 10%. Doubling number of implemented rounds in hardware increases resources and power by an average of 43% and 38% respectively. Optimum energy per bit design is produced in the designs with small block size (i.e. 32-bit) in the cases when number of implemented rounds equals to 32 or 64 rounds. When the energy and area design requirements are to be balanced, the optimum design is the 16-round implementation. Furthermore, developed models are tested on HIGHT cipher and demonstrate good accuracy.
ناشر
Database: Elsevier - ScienceDirect (ساینس دایرکت)
Journal: Future Generation Computer Systems - Volume 83, June 2018, Pages 510-521
نویسندگان
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