Hopf bifurcation and chaos in a third-order phase-locked loop

• Hopf bifurcation theorem is applied to the design of PLLs.
• A lock-in region of the parameter space is delimited by using local linearization.
• Limit cycle resulting from Hopf bifurcation is stable preventing synchronization.
• A route to chaos is presented originated in the Hopf bifurcation.

Phase-locked loops (PLLs) are devices able to recover time signals in several engineering applications. The literature regarding their dynamical behavior is vast, specifically considering that the process of synchronization between the input signal, coming from a remote source, and the PLL local oscillation is robust. For high-frequency applications it is usual to increase the PLL order by increasing the order of the internal filter, for guarantying good transient responses; however local parameter variations imply structural instability, thus provoking a Hopf bifurcation and a route to chaos for the phase error. Here, one usual architecture for a third-order PLL is studied and a range of permitted parameters is derived, providing a rule of thumb for designers. Out of this range, a Hopf bifurcation appears and, by increasing parameters, the periodic solution originated by the Hopf bifurcation degenerates into a chaotic attractor, therefore, preventing synchronization.