Flexible and extendible neural interface device based on cooperative multi-chip CMOS LSI architecture

An LSI-based cooperative multi-chip neural interface device, for stimulation as well as recording, is proposed and fabricated. The proposed multi-chip device consists of small (600 μm × 600 μm in the present design) intelligent neural interface unit chips. The unit chip has nine neural stimulation/recording electrodes and an individual control circuit. It can work not only as a stand-alone unit, but also in cooperation with other unit chips. One can configure any number of the unit chips as a multi-chip neural interface device. Compared to conventional single-chip architecture, the proposed multi-chip architecture has a number of advantages including thinness, mechanical strength, flexibility, and extendibility. That makes the multi-chip neural interface device more suitable for in vivo applications than conventional single-chip devices. Packaging technology for the multi-chip device was also developed. We developed a thin, flexible packaging technique for the multi-chip neural interface device and LSI-compatible Pt/Au stacked bump electrodes. The functions of the fabricated multi-chip neural interface device were characterized and the feasibility of the device as a random-access, multi-site stimulator was demonstrated.