Analytical model for C-V characteristic of fully depleted SOI-MOS capacitors

A new analytical model for two-terminal fully depleted silicon-on-insulator metal oxide semiconductor field effect transistors capacitor for low frequency applications is presented. To simplify the model, the structure capacitor is modeled by a series combination of front and back gates capacitors. The former has symmetrical capacitance voltage behavior while the latter has an asymmetrical one. Explicit expressions for the Si film capacitances are derived based on charge based modeling approach. The closed form expressions presented in the model are valid for a wide range of gate voltages. In addition, the model takes into account the variations of SOI film thickness and is valid for Si films with thickness between 100 nm and 250 nm. A comparison between the results predicted by the analytical model and those of a numerical Poisson's solver indicates errors less than 1.3% over a wide range of gate voltages.