Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
10411673 | Solid-State Electronics | 2005 | 8 Pages |
Abstract
This work studies the effect of halo implantation on the electrical characteristics of deep-submicrometer partially depleted SOI nMOSFETs during low temperature and floating body operation. Parameters such as the drain induced barrier lowering (DIBL) and the device thermal resistance have been investigated. It is shown that the combination of floating body operation with halo implantation degrades the DIBL in the temperature range studied (90Â K-300Â K) in comparison to devices that did not received this implantation. The halo region causes a more pronounced negative output conductance than for the transistors without a halo implantation. An estimation of the temperature rise for a given dissipated power in both types of devices is made, based on the thermal resistance, which is derived from the output characteristics in function of the temperature.
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Physical Sciences and Engineering
Engineering
Electrical and Electronic Engineering
Authors
Marcelo Antonio Pavanello, João Antonio Martino, Eddy Simoen, Cor Claeys,