Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
10411910 | Solid-State Electronics | 2005 | 6 Pages |
Abstract
Silicon nanocrystal memories offer opportunities for voltage scaling and process simplification for embedded non-volatile memories. While electrically isolated nanocrystals mitigate charge loss through oxide defects, the impact of nanocrystal size and density characteristics as well as statistical fluctuations on memory arrays is not well understood. This paper shows that the memory window and high temperature data retention are roughly insensitive over a broad range of nanocrystal characteristics. Further, data from mega-bit arrays shows that nanocrystal coalescence effects are small.
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Engineering
Electrical and Electronic Engineering
Authors
R.A. Rao, H.P. Gasquet, R.F. Steimle, G. Rinkenberger, S. Straub, R. Muralidhar, S.G.H. Anderson, J.A. Yater, J.C. Ledezma, J. Hamilton, B. Acred, C.T. Swift, B. Hradsky, J. Peschke, M. Sadd, E.J. Prinz, K.M. Chang, B.E. Jr.,