Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
10413345 | Solid-State Electronics | 2005 | 7 Pages |
Abstract
The comprehensive understanding of the electrical behaviour of silicon nanostructures becomes more and more important for the evolution of the microelectronics towards nanoelectronics. In this context, we present a complete bench test for the study of silicon nanostructures, from the fabrication by a non-conventional technique, to the electrical characterisation at room and low temperature. Nanostructures with lateral gates are fabricated with an atomic force microscope (AFM) on silicon on insulator (SOI) substrates. At room temperature, we demonstrate a field effect transistor-like behaviour due to the backgate and also to the lateral gate. At low temperature, the electrical transport is a superimposition of the field effect and single-electron phenomena (Coulomb blockade). We demonstrate the one-dimensional character of the electrical transport at low temperature using a theoretical model for arrays of dots.
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Authors
I. Ionica, L. Montès, S. Ferraton, J. Zimmermann, L. Saminadayar, V. Bouchiat,