Article ID Journal Published Year Pages File Type
10674436 CIRP Annals - Manufacturing Technology 2013 4 Pages PDF
Abstract
In the chemical-mechanical polishing (CMP) of semiconductor structures, such defects as micro- and nano-scale scratches are frequently produced on the surfaces being polished. Recent research shows that not only agglomerated abrasives but the softer pad asperities in frictional contact also scratch the relatively hard surfaces. Accordingly, pad scratching is modeled based on the topography and mechanical properties of pad asperities. Asperity radius, Ra, and the standard deviation of asperity heights, σz, are identified as the key topographical parameters. The theoretical models and experimental results show that pad scratching in CMP can be mitigated by increasing Ra/σz.
Related Topics
Physical Sciences and Engineering Engineering Industrial and Manufacturing Engineering
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