Design of nonlinear CMOS circuits in the Nano-GHz Era and its mathematical challenges

Modern communication systems are working on industrial, scientific and medical (ISM) radio frequency (RF) bands. Today most research and development activities in industrial companies and universities are concentrated to frequency bands between 1 GHz and 24 GHz up to 60 GHz. For the construction of mixed-signal chips for cellular telephones and other wireless LAN applications (Bluetooth, HIPERLAN, etc.) different semiconductor technologies are used. In order to combine analogue functionality for the RF front end and digital functionality for high-speed signal processing nonlinear circuit concepts must be used and CMOS technology has to be applied. In order to construct high-quality RF transceiver chips a submicron CMOS technology (180 nm and below) is needed. Therefore we come into the Nano-GHz Era of circuit design. In this work corresponding mathematical challenges of modern RF CMOS design of transceiver circuits, with a focus on oscillator circuits, are discussed. It is shown that these circuits can be modelled as dynamical systems and their environment and their devices by partial differential equations. For circuit design aspects bifurcation theory and other mathematical concepts from dynamical systems as well as advanced numerical methods can be applied in order to build up an efficient design system for these RF CMOS circuits. In this paper some key aspects of future circuit design will be presented and discussed.