Neural network-based design approach for submicron MOS integrated circuits

In this work, a neural network-based solution to BSIM3v3 MOSFET model is developed to find the most suitable channel parameters to improve the production yield and operation accuracy of submicron integrated circuits. By means of the proposed solution the channel parameters of each transistor can be found using terminal voltages and the drain current. The training data of the developed neural network are obtained by various simulations in the HSPICE design environment with TSMC 0.18μ and AMIS 0.5μ process parameters. The neural network structure is developed and trained in MATLAB 6.0 environment. The efficiency of the proposed neural network-based model is tested on different analog integrated circuits.