A pentacene thin film transistor with good performance using sol–gel derived SiO2 gate dielectric layer

A low-voltage pentacene field-effect transistor with sol–gel derived SiO2 gate dielectric was fabricated. The mobility of the transistor was achieved as high as 1.526 cm2/V on the bared SiO2/Si substrate by a higher dielectric constant. The interface state density for the transistor was found to vary from 3.8 × 1010 to 7.5 × 1010 eV−1 cm−2 at frequency range of 100 kHz–1 MHz. It is evaluated that the SiO2 derived by low cost sol–gel is quite a promising candidate as a gate dielectric layer for low-voltage pentacene field-effect transistor.

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