Effect of Different Low Temperatures on Current Transport Mechanisms and Frequency Effect on Capacitance-voltage Curves for MOS-diodes

Thin SiO2 films with thickness 5-10 nm were grown at 700°C in dry ambient. The devices with oxide 5 nm approach ideality case at room temperature, in this case thermoionic emission over the barrier is dominate mechanism with traps was dominate. Capacitance-voltagedata in the form of 1/C2 verse voltage plot has been used to extract doping on the space charge region. The barrier height from I-V calculated 0.65, 0.64 V for devices with oxide 5, 10 nm respectively, this value difference from values extract from C-V plot which found 0.57, 0.64 V.