Article ID Journal Published Year Pages File Type
1514253 Energy Procedia 2011 5 Pages PDF
Abstract
The major barrier for PV penetration is cost. And the most important cost factor in silicon technology is the wafer (50% of the module cost). Although tremendous progress on cell processing has been reported in recent years, a much smaller evolution is seen on what should be the key point to address - the wafer. The ingot-slicing process is reaching its limits as the wafer thickness reduces in an effort to reduce costs. Kerf losses are putting a lower bound in this approach. To remain competitive we have to come up with new ideas for producing wafers in a way to overcome these limitations. In this paper we present some new concepts being developed in our laboratory that have one thing in common. They all are zero kerf loss processes. Considering that kerf loss can be higher than 50% of the final wafer material, of an already high valued material, this aspect is certainly important. Among these new techniques, we are developing processes for the growth of silicon directly into ribbons. They were conceived as continuous processes, based on a floating molten zone concept, to avoid impurity contamination during the crystallization. More singularly for continuous processes, they were conceived to allow for impurity segregation, making them interesting for lesspure silicon feedstock.
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Physical Sciences and Engineering Energy Energy (General)
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