Electroless copper deposition on silicon with titanium seed layer

The characteristics of the diffusion barrier layer, that prevents copper migration into the silicon substructure, are critical to the successful use of copper as a conductor in integrated circuits (ICs). This paper describes an electroless deposition of Cu on silicon with titanium (Ti) seed layer, which also serves as adhesion promoting layer and barrier layer to Cu diffusion. The deposition rate and surface morphology are studied as a function of different plating parameters such as the concentration of complexing and reducing agent, temperature, deposition time, pH and additive concentration. All the electroless deposits with thickness up to 100 nm were found to adhere well to the substrates. Surface morphology of the deposited films studied using scanning electron microscope (SEM) and atomic force microscopy (AFM) showed that the roughness and grain size tend to increase with increasing temperature and pH with an optimum being reached at 50 °C and pH 12.5. X-ray diffraction (XRD) analysis shows that the peak intensity ratio I(1 1 1)/I(2 0 0) of plated copper increased after thermal annealing at 300 °C for 1 h in N2 ambient and without any copper diffusion into Ti/SiO2 interface. The electrical resistivity of copper films as determined by four-probe measurement showed that the resistivity decreased with increasing annealing time and a low resistivity of 2.9 μΩ-cm was obtained after annealing at 300 °C in N2 ambient for 90 min.