Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
1530619 | Materials Science and Engineering: B | 2009 | 4 Pages |
We report on the electrical behaviour of metal–insulator–semiconductor (MIS) structures fabricated on p-type silicon substrates and using polymethylmethacrylate (PMMA) as the dielectric. Gold nanoparticles, single-wall carbon nanotubes and C60, deposited at room temperature, were used as charge-storage elements. In all cases, the MIS devices containing the nanoparticles exhibited hysteresis in their capacitance versus voltage characteristics, with a memory window depending on the range of the voltage sweep. This hysteresis was attributed to the charging and discharging of the nanoparticles from the gate electrode. A relatively large memory window of about 2.2 V was achieved by scanning the applied voltage of an Al/PMMA/C60/SiO2/Si structure between 4 and −4 V. Gold nanoparticle-based memory devices produced the best charge retention behaviour compared to the other MIS structures investigated.