Nanostructuring Si surface and Si/SiO2 interface using porous-alumina-on-Si template technology. Electrical characterization of Si/SiO2 interface

In this work, anodic porous alumina thin films with pores in the nanometer range are grown on silicon by electrochemistry and are used as masking material for the nanopatterning of the silicon substrate. The pore diameter and density are controlled by the electrochemical process. Through the pores of the alumina film chemical oxidation of the silicon substrate is performed, leading to the formation of regular arrays of well-separated stoichiometric silicon dioxide nanodots on silicon, with a density following the alumina pores density and a diameter adjustable by adjusting the chemical oxidation time. The alumina film is dissolved chemically after the SiO2 nanodots growth, revealing the arrays of silicon dioxide dots on silicon. In a next step, the nanodots are also removed, leaving a nanopatterned bare silicon surface with regular arrays of nanopits at the footprint of each nanodot. This silicon surface structuring finds interesting applications in nanoelectronics. One such application is in silicon nanocrystals memories, where the structuring of the oxidized silicon surface leads to the growth of discrete silicon nanocrystals of uniform size. In this work, we examine the electrical quality of the Si/SiO2 interface of a nanostructured oxidized silicon surface fabricated as above and we find that it is appropriate for electronic applications (an interface trap density below 1-3×1010 eV−1 cm−2 is obtained, indicative of the high quality of the thermal silicon oxide).