| Article ID | Journal | Published Year | Pages | File Type |
|---|---|---|---|---|
| 1552482 | Superlattices and Microstructures | 2016 | 7 Pages |
•A junctionless MOSFET with asymmetric gates (AG-JL MOSFET) was proposed.•AG-JL MOSFET offers a high ION and low IOFF for 20 nm gate length.•AG-JL MOSFET offers less sensitive to process variations.
In this work, we propose a junctionless MOSFET with asymmetric gates (AG-JL MOSFET). This device is a double gate structure with a lateral offset between the gate, and this leads to different characteristic than a conventional double gate structure. Specifically, the asymmetric gate modulates the effective channel length depending on whether the device is in the ON or OFF state, which this leads to more ideal device characteristics. A comprehensive device performance comparison including the ION/IOFF ratio, subthreshold slope (SS), and drain-induced barrier lowering (DIBL) between the proposed device and a conventional device is presented. The proposed device exhibits superior performance when compared a conventional device, and results show that it is also less sensitive to process variations.
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