| Article ID | Journal | Published Year | Pages | File Type |
|---|---|---|---|---|
| 1552699 | Superlattices and Microstructures | 2016 | 8 Pages |
•A new LDMOS transistor for high breakdown voltage and reduced lattice temperature is proposed.•Periodic trench region with Si3N4 is considered in the drift region to reduce lattice temperature.•Additional peaks create in the electric field profile to increase breakdown voltage.•The simulation with ATLAS simulator shows the benefits of proposed structure in comparison to conventional LDMOS structure.
A new device structure for high breakdown voltage and low maximum lattice temperature of the LDMOS device is proposed in this paper. The main idea in the proposed structure is using a Si3N4 trench region with open windows made by silicon in it. In the conventional structure, a trench oxide was used to have high breakdown voltage that causes high lattice temperature. So, replacing Si3N4 material is suitable way to have a more reliable device. The proposed periodic trench region in LDMOS transistor (PTR-LDMOS) has periodic open windows to increase the additional peaks in the electric field profile and increase the breakdown voltage. Also, the simulation with two-dimensional ATLAS simulator shows that reduced main electric field peaks cause low electron temperature that enhances the reliability of the proposed structure.
