Impact of barrier thickness on Analog, RF and Linearity performance of nanoscale DG heterostructure MOSFET

•For the first time, the effect of barrier thickness for heterostructure DG MOSFET.•Analog/RF and linearity performance of heterostructure MOSFET on barrier thickness.•The RF/Analog performance of the device improves as barrier layer thickness reduces.•The linearity performance deteriorates as thickness of the barrier layer reduces.

In this work, we have analyzed the Analog, RF and Linearity performance of InP/InGaAs hetero-junction MOSFET using TCAD device simulation. A detailed investigation of the impact of barrier layer thickness on different Analog, RF and Linearity performance of an InGaAs/InP heterostructure DG MOSFET is carried out. A thorough analysis of the key figure-of-merits such as transconductance (gm), Output resistance (Ro), gate capacitance, cutoff frequency (fT), maximum frequency of oscillation (fmax), VIP2, VIP3, IIP3, IMD3 and 1 dB compression point are performed for various barrier thickness ranging from 1 nm to 4 nm. From the simulation results it is observed that performance of nanoscale DG heterostructure MOSFET is affected by the variation of barrier thickness of the device.