Si–Ge–Sn alloys: From growth to applications

In this review article, we address key material parameters as well as the fabrication and application of crystalline GeSn binary and SiGeSn ternary alloys. Here, the transition from an indirect to a fundamental direct bandgap material will be discussed. The main emphasis, however, is put on the Si–Ge–Sn epitaxy. The low solid solubility of α-Sn in Ge and Si of below 1 at.% along with the large lattice mismatch between α-Sn (6.489 Å) and Ge (5.646 Å) or Si (5.431 Å) of about 15% and 20%, respectively, requires non-equilibrium growth processes. The most commonly used approaches, i.e. molecular beam epitaxy (MBE) and chemical vapor deposition (CVD), will be reviewed in terms of crucial process parameters, structural as well as optical quality and employed precursor combinations including Germanium hydrides, Silicon hydrides and a variety of Sn compounds like SnD4, SnCl4 or C6H5SnD3. Special attention is devoted to the growth temperature window and growth rates being the most important growth parameters concerning the substitutional incorporation of Sn atoms into the Ge diamond lattice. Furthermore, the mainly CVD-driven epitaxy of high quality SiGeSn ternary alloys, allowing the decoupling of band engineering and lattice constant, is presented. Since achieving fundamental direct bandgap Sn-based materials strongly depends on the applied strain within the epilayers, ways to control and modify the strain are shown, especially the plastic strain relaxation of (Si)GeSn layers grown on Ge.Based on recently achieved improvements of the crystalline quality, novel low power and high mobility GeSn electronic and photonic devices have been developed and are reviewed in this paper. The use of GeSn as optically active gain or channel material with its lower and potentially direct bandgap compared to fundamentally indirect Ge (0.66 eV) and Si (1.12 eV) provides a viable solution to overcome the obstacles in both fields photonics and electronics. Moreover, the epitaxial growth of Sn-based semiconductors using CMOS compatible substrates on the road toward a monolithically integrated and efficient group IV light emitter is presented.

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