Transistor device for multi-bit non-volatile storage

We propose a transistor model that incorporates multiple storage elements within a single transistor device. This device is thus smaller in size compared to the magnetoresistive random access memory (MRAM) with the same number of storage bits. The device model can function in both the current as well as voltage detection mode. Simulations were carried out at higher temperature, taking into consideration the spread of electron density above the Fermi level. We found that linear detection of conductance variation with the stored binary value can be achieved for a 3-bit storage device up to a temperature of 350 K.