On the profile of frequency and voltage dependent interface states and series resistance in MIS structures

The variation in the capacitance–voltage (C–V) and conductance–voltage (G/ω–V) characteristics of Au/SiO2/n-Si metal–insulator–semiconductor (MIS) structure have been systematically investigated as a function of frequencies in the frequency range 0.5 kHz–10 MHz at room temperature. In addition, the forward and reverse bias current–voltage (I–V) characteristics of this structure were measured at room temperature. The high value of ideality factor was attributed to the high density of interface states localized at Si/SiO2 interface and interfacial oxide layer. The density of interface states (Nss) and the series resistance (Rss) were calculated from I–V and C–V measurements using different methods and the effect of them on C–V and G/ω–V characteristics were deeply researched. At the same energy position near the top of valance band, the calculated Nss values, obtained without taking into account the series resistance of the devices almost one order of magnitude larger than Nss values obtained by taking into account Rss values. It is found that the C–V and G/ω–V curves exhibit a peak at low frequencies and the peak values of C and G/ω decrease with increasing frequency. Also, the plots of Rs as a function of bias give two peaks in the certain voltage range at low frequencies. These observations indicate that at low frequencies, the charges at interface states can easily follow an AC signal and the number of them increases with decreasing frequency. The I–V, C–V and G/ω–V characteristics of the MIS structure are affected not only with Rs but also Nss. Experimental results show that both the Rs and Co values should be taken into account in determining frequency-dependent electrical characteristics.