Effect of oxide thickness on the capacitance and conductance characteristics of MOS structures

In this work, the investigation of the interface states density and series resistance from capacitance–voltage (C–V) and conductance–voltage (G–V) characteristics in Au/SnO2/n-Si (MOS) structures prepared at various SnO2 layer thicknesses by spray deposition technique have been reported. It is fabricated five samples depending on deposition time. The thicknesses of SnO2 films obtained from the measurement of the oxide capacitance in the strong accumulation region for MOS Schottky diodes are 37, 79, 274, 401, and 446 Å, for D1, D2, D3, D4, and D5 samples, respectively. The C–V and G–V measurements of Au/SnO2/n-Si MOS structures are performed in the voltage range from −6 to +10 V and the frequency range from 500 Hz to 10 MHz at room temperature. It is observed that peaks in the forward C–V characteristics appeared because of the series resistance. It has been seen that the value of the series resistance Rs of samples D1 (47 Ω), D2 (64 Ω), D3 (98 Ω), D4 (151 Ω), and D5 (163 Ω) increases with increasing the oxide layer thickness. The interface state density Dit ranges from 2.40×1013 cm−2 eV−1 for D1 sample to 2.73×1012 cm−2 eV−1 for D5 sample and increases with increasing the oxide layer thickness.