Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
1825541 | Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment | 2011 | 4 Pages |
Abstract
Deep N-well (DNW) MAPS have been developed in the last few years with the aim of building monolithic sensors with similar functionalities as hybrid pixels systems. These devices have been fabricated in a planar (2D) 130Â nm CMOS technology. The triple-well structure available in such an ultra-deep submicron technology is exploited by using the deep N-well as the charge-collecting electrode. This paper intends to discuss the design features and measurement results of the last prototype (Apsel5T chip) recently fabricated in a 2D 130Â nm CMOS technology. Recent advances in microelectronics industry have made 3D integrated circuits an option for High Energy Physics experiments. A 3D version of the Apsel5T chip has been designed in a 130Â nm CMOS, two-layer, vertically integrated technology. The main features of this new 3D monolithic detector are presented in this paper.
Related Topics
Physical Sciences and Engineering
Physics and Astronomy
Instrumentation
Authors
Gianluca Traversi, Luigi Gaioni, Massimo Manghisoni, Lodovico Ratti, Valerio Re,