| Article ID | Journal | Published Year | Pages | File Type |
|---|---|---|---|---|
| 1830718 | Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment | 2007 | 4 Pages |
The progress of a research aimed to design CMOS front-end with noise level down to few electrons r.m.s. is presented. The interest in ultra-low-noise Application-Specific Integrated Circuits (ASICs) has been stimulated by silicon carbide pixel radiation detectors with negligible electronic noise at room temperature due to leakage currents in the femtoampere range. An experimental study on the 1/f noise of p-channel MOSFETs of different size has allowed to determine a quite accurate model, according to Hooge, useful for the IC front-end design. An ultra-low noise integrated charge preamplifier in 0.35 μm CMOS technology designed for 0.5 pF detector is presented. Experimental results show intrinsic equivalent noise charge of 7.6 electrons r.m.s. with noise slope of 18e− pF−1 at power consumption as low as 41 μW. The best measured noise performance is 3.9 electrons r.m.s. +6.2e− pF−1 with a preamplifier operating at 2.3 mW of power consumption.
