Defects analysis and improvement of a chaotic logic gate

We introduced one chaotic logic gate design and described its performance defects. These defects, namely nondeterminacy and variability of the output signal, were depicted and analysis for the reasons behind them was done. Further more, a new logic gate design by changing the variable under control is proposed. By successfully overcoming defects of the prototype, the new chaotic logic gate can be better applied to a complicated computing architecture.

► We depicted the defects (possible function failures) of a proposed dynamic chaotic logic gate. ► We analyzed reasons behind the defects. ► We did small modifications to the dynamic logic gate design and overcame the defects successfully. ► Simulation results were given and dynamical performance was analyzed to improve the robustness of the design.