Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
229237 | Journal of Industrial and Engineering Chemistry | 2010 | 4 Pages |
Abstract
Capacitance–voltage hysteresis for a non-volatile memory was realized in a metal–pentacene–insulator–silicon (MPIS) device using gold (Au) nanoparticles (NPs) intervened between pentacene and SiO2 insulator. A memory window higher than 2.0 V was obtained under (±) 5 V programming sweeping range. The SiO2 as thick as 30 nm was adopted as the dielectric layer, and 3-aminopropyl-triethoxysilane (APTES) was used for self-assembling of Au NPs monolayer. In addition, citrate-functionalized Au NPs was dip-coated and used as charge storage elements. Formation of a monolayer of the Au NPs was confirmed by HR-SEM and AFM. Capacitance–voltage hysteresis in this study was resulted from the charge storage in the layer of Au NPs.
Keywords
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Physical Sciences and Engineering
Chemical Engineering
Chemical Engineering (General)
Authors
Hyung-Jun Kim, Sung Mok Jung, Bong-Jin Kim, Tae-Sik Yoon, Yong-Sang Kim, Hyun Ho Lee,