Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
2577003 | International Congress Series | 2006 | 4 Pages |
Image filtering with large receptive-field area is essential for brain-like vision systems. The typical processing model using such filtering is convolutional neural networks (CoNNs). The CoNNs are a well-known robust image-recognition processing model, which imitates the vision nerve system in the brain. To realize such image processing, we have developed an image-filtering processor VLSI. The VLSI designed using a 0.35 μm CMOS process performs 6-bit precision convolutions for an image of 80 × 80 pixels with a receptive-field size of up to 51 × 51 pixels within 8.2 ms. Because the VLSI is based on a hybrid approach using pulse-width modulation (PWM) and digital circuits, low power-consumption of 220 mW has been achieved. Face position detection can be performed within 66 ms by using the developed VLSI.