Distributed PLC Based on Multicore CPUs - Architecture and Programming

The paper presents a complete approach to distributed control system design including architecture and programming. The system consists of distributed controllers connected with a network. A multiple core controller architecture is proposed utilizing independent bit and word units in MIMD structure. Calculation process is efficiently synchronized by original implementation of semaphored memory system. The program partitioning and distribution among processing units is made automatically by proposed compiler. For a purpose of program distribution and scheduling a graph based representation of the standard program is used. Developed conversion model enables compilation of selected standard languages into independent graph based form. The distributed controller architecture has been prototyped with use of PFGA devices that enables specific implementation and evaluation of performance. The data exchange was implemented with use of deterministic protocol based on token passing.