Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
5002888 | IFAC-PapersOnLine | 2016 | 6 Pages |
Abstract
The article discusses the design process of the central processing unit (CPU) for programmable logic controllers. On the one hand the designed CPU is compatible with IEC 61131-3 standard. On the other hand, the authors attempt to reflect on the possible implementations of the unit by means of FPGA. The machine instructions of the unit are tailored to be similar to instruction list (IL) introduced in the IEC 61131-3 standard. However, the unit is programmed by means of the standard IL. Remarks about the IEC standard and the specific features of the FPGA technology are presented.
Related Topics
Physical Sciences and Engineering
Engineering
Computational Mechanics
Authors
Przemyslaw Mazur, Miroslaw Chmiel, Robert Czerwinski,