Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
5010273 | Solid-State Electronics | 2017 | 17 Pages |
Abstract
The use of a GeO2 interfacial layer (IL) between a high-k dielectric and a Ge substrate helps to reduce the interface state density in Ge MOS devices. We report that the presence of the GeO2 IL changes the effective work function (eWF) of the gate stack when annealed after high-k dielectric deposition. The eWF is reduced from 4.31Â eV to 3.98Â eV for TaN and from 5.00Â eV to 4.44Â eV for Ni. Consequently, the threshold voltage (Vth) decreases from 0.69Â V to 0.21Â V for Ni after post deposition annealing. Our investigation confirms that the generation of oxygen vacancies in the GeO2 IL near the Ge substrate is the main cause of the eWF modulation. In addition, the reliability of the GeO2 IL is investigated via the conductance method and a constant-current stress test.
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Authors
Tae In Lee, Yujin Seo, Jungmin Moon, Hyun Jun Ahn, Hyun-Young Yu, Wan Sik Hwang, Byung Jin Cho,