Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
5010328 | Solid-State Electronics | 2017 | 8 Pages |
Abstract
We report the first RF characterization of short-channel replacement metal gate (RMG) InGaAs-OI nFETs built in a 3D monolithic (3DM) CMOS process. This process features RMG InGaAs-OI nFET top layer and SiGe-OI fin pFET bottom layer. We demonstrate state-of-the-art device integration on both levels. The bottom layer SiGe-OI pFETs are fabricated with a Gate-First (GF) process with fins and featuring epitaxial raised source drain (RSD) as well as silicide contact layer. The top layer InGaAs nFETs are fabricated with a RMG process featuring a self-aligned epitaxial raised source drain (RSD). We show that the 3D monolithic integration scheme does not degrade the performance of the bottom SiGe-OI pFETs owing to an optimized thermal budget for the top InGaAs nFETs. From the RF characterizations performed (post-3D monolithic process) on multifinger-gate InGaAs-OI nFETs, we extract a cut-off frequency (Ft) of 16.4Â GHz at a gate-length (Lg) of 120Â nm. Measurements on various gate lengths shows increasing cut-off frequency with decreasing gate-length.
Keywords
Related Topics
Physical Sciences and Engineering
Engineering
Electrical and Electronic Engineering
Authors
V. Deshpande, V. Djara, E. O'Connor, P. Hashemi, K. Balakrishnan, D. Caimi, M. Sousa, L. Czornomaz, J. Fompeyrine,