Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
5010338 | Solid-State Electronics | 2017 | 9 Pages |
Abstract
Reconfigurable FETs (RFETs) are optimized in planar Fully Depleted (FD) SOI. Their basics, electrostatics and performance are studied and compared with standard 28Â nm FDSOI and other RFETs results in the literature. The main challenge for future broad adoption is analyzed and commented. Finally, some tips to improve the performance such as the asymmetric silicidation at source/drain are discussed.
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Physical Sciences and Engineering
Engineering
Electrical and Electronic Engineering
Authors
C. Navarro, S. Barraud, S. Martinie, J. Lacord, M.-A. Jaud, M. Vinet,