Low-frequency noise in bare SOI wafers: Experiments and model

Low-frequency noise (LFN) measurements are largely used for interface quality characterization in MOSFETs. In this work, a detailed investigation of LFN technique applied to pseudo-MOSFETs in bare silicon-on-insulator (SOI) substrates is provided. A physical model capable to describe the experimental results is proposed and validated using different die areas and inter-probe distances. The effective silicon area contributing to the noise signal, the impact of defects induced by probes and the possibility to extract interface trap density are addressed.