Simulation study of interface traps and bulk traps in n++GaN/InAlN/AlN/GaN high electron mobility transistors

We investigate the impact of interface traps and bulk traps on the performance of n++GaN/InAlN/AlN/GaN high electron mobility transistors (HEMTs) using two-dimensional Sentaurus TCAD simulation. The device uses lattice-matched wide bandgap In0.17Al0.83N as a thin barrier layer. The simulations are performed using the thermodynamic transport model. Interface and bulk traps are accounted for in our simulations. The results indicate a significant influence of both acceptor and donor traps on device operation, as long as the traps are considered in the barrier layer. On the other hand, simulations with donor traps specified at the In0.17Al0.83N/n++GaN cap interface show no influence on the transfer characteristic.