Development and applications of a multi-purpose digital controller with a System-on-Chip FPGA for accelerators

J-PARC Main Ring (MR) is a high intensity proton synchrotron which accelerates protons from 3 GeV to 30 GeV. It has operated at a beam intensity of 390 kW and an upgrade toward the megawatt rating is scheduled. For higher beam intensity, some of the accelerator components require more intelligent and complicated functions. To consolidate such functions among various components, we developed multi-purpose digital boards using a System-on-Chip Field-Programmable Gated Array (SoC FPGA). In this paper, we describe the details of our developed boards as well as their possible applications. As an application of the boards, we have successfully performed the measurement of the betatron amplitude function during beam acceleration in J-PARC MR. The experimental setup and results of the measurement are also described in detail.