Automatic verification of control logics in safety instrumented system design for chemical process industry

Automatic model checking is used to determine the error-free design of the SIS (Safety Instrumented System) and to find the logical errors in the chemical processes. It proposes an automatic technique to provide and to modify the P&ID design of SIS control logics. This method can be applied to verify its correctness of SIS and to find the logical errors by synthesizing a feasible sequence automatically. This study focuses on automatic verifying and synthesizing for the design, operability and reachability of SIS control logics in chemical processes.