Article ID Journal Published Year Pages File Type
6268779 Journal of Neuroscience Methods 2014 11 Pages PDF
Abstract

•This paper presents the design of a complete multi-channel neural recording compression and communication system suitable for intra-cortical neural interfaces.•The compression engine offers a practical data compression solution that faithfully preserves neural information.•The communication engine utilizes a protocol capable of error handling.•A 32-channel neural compression and communication chip designed in 0.13 μm CMOS occupies only 1.21 mm2 and consumes 800 μW of power.

This paper presents the design of a complete multi-channel neural recording compression and communication system for wireless implants that addresses the challenging simultaneous requirements for low power, high bandwidth and error-free communication. The compression engine implements discrete wavelet transform (DWT) and run length encoding schemes and offers a practical data compression solution that faithfully preserves neural information. The communication engine encodes data and commands separately into custom-designed packet structures utilizing a protocol capable of error handling. VLSI hardware implementation of these functions, within the design constraints of a 32-channel neural compression implant, is presented. Designed in 0.13 μm CMOS, the core of the neural compression and communication chip occupies only 1.21 mm2 and consumes 800 μW of power (25 μW per channel at 26 KS/s) demonstrating an effective solution for intra-cortical neural interfaces.

Related Topics
Life Sciences Neuroscience Neuroscience (General)
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