Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
6456790 | Solar Energy Materials and Solar Cells | 2017 | 10 Pages |
â¢In depth analysis of n-type c-Si TOPCon solar cells with front side boron-diffused emitter.â¢Efficiency of 25% obtained for a wide range of wafer thicknesses and resistivities.â¢Detailed simulation study allows to identify main loss mechanism.â¢Solar cells made of high resistivity silicon more sensitive to bulk lifetime limitation.â¢Champion cell efficiency: 25.7% (record for both sides contact Si solar cells).
In this work, the efficiency of n-type silicon solar cells with a front side boron-doped emitter and a full-area tunnel oxide passivating electron contact was studied experimentally as a function of wafer thickness W and resistivity Ïb. Conversion efficiencies in the range of 25.0% have been obtained for all variations studied in this work, which cover 150 µm to 400 µm thick wafers and resistivities from 1 Ω cm to 10 Ω cm. We present a detailed cell analysis based on three-dimensional full-area device simulations using the solar cell simulation tool Quokka. We show that the experimental variation of the wafer thickness and resistivity at device level in combination with a detailed simulation study allows the identification of recombination induced loss mechanisms. This is possible because different recombination mechanisms can have a very specific influence on the I-V parameters as a function of W and Ïb. In fact, we identified Shockley-Read-Hall recombination in the c-Si bulk as the source of a significant FF reduction in case of high resistivity Si. This shows that cells made of high resistivity Si are very sensitive to even a weak lifetime limitation in the c-Si bulk. Applying low resistivity 1 Ω cm n-type Si in combination with optimized fabrication processes, we achieved confirmed efficiency values of 25.7%, with a VOC of 725 mV, a FF of 83.3% and a JSC of 42.5 mA/cm2. This represents the highest efficiency reported for both-sides contacted c-Si solar cells. Thus, the results presented in this work demonstrate not only the potential of the cell structure, but also that a variation of the wafer thickness and resistivity at device level can provide deep insights into the cell performance.
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