A Pseudo Open Loop Synchronization technique for heavily distorted grid voltage

Grid-tied inverters are widely used in the modern power network. The span of their applications varies from power quality enhancement, uninterruptible power supply, grid interface to distributed energy sources, etc. A major aspect of controlling the grid-tied power converter is the synchronization with the main grid. A robust synchronization method is required to maintain the power injection during grid fault and highly distorted grid voltage. This paper introduces a novel Pseudo-Open Loop Synchronization Technique (POLS) based on a fixed reference frame estimator: the Fundamental Positive Components Estimator (PFCE). The algorithm will generate three unitary sinus waveform synchronized with the fundamental positive component of a three-phase grid voltage. Open Loop Synchronization (OLS) technique differs from the closed loop PLL in that it has a faster dynamics response. Two problems may face the OLS: a low-quality main voltage and frequency drift. To face the voltage quality problem, the PFCE is used. This choice is advantageous over the use of a low-pass filter due to the absence of the time delay and filtering performances. For the frequency drift, an optional simple frequency estimator is used. No trigonometric computation is required for the proposed algorithm, making it easy to implement on a low-cost microcontroller. The performances and effectiveness of the proposed method are demonstrated through simulation and experimental results.