Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
7150962 | Solid-State Electronics | 2015 | 5 Pages |
Abstract
This study demonstrated the application of a dual plasma treatment to low-temperature polycrystalline-silicon thin-film transistors (LTPS-TFTs) comprising a self-aligned phosphorus implantation source and drain, high-κ HfO2 gate dielectric, and aluminum metal gate. The dual plasma treatment involves a pre-deposition CF4 plasma treatment at a high-κ/poly-Si interface and post-deposition N2 plasma treatment at a high-κ HfO2 gate dielectric; this treatment enables reducing the interface-trap-state defects at the high-κ/poly-Si interface, grain boundary traps in the poly-Si channel film, and oxygen vacancy Vo in the high-κ HfO2 gate dielectric. Thus, LTPS-TFTs with dual plasma treatment demonstrate excellent electrical characteristics such as threshold voltage, subthreshold swing, transconductance, driving current, and on/off current ratio. Flicker noise, also referred to as 1/f noise, caused by fluctuations of carriers transported in the grain boundary and the trapped carriers per unit oxide volume (Nt) can be suppressed. Therefore, high performance LTPS-TFTs subjected to dual plasma treatment can be appropriately applied to active matrix liquid phase-crystal display on system-on-panel technology.
Keywords
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Physical Sciences and Engineering
Engineering
Electrical and Electronic Engineering
Authors
Kow-Ming Chang, Bo-Wen Huang, Chien-Hung Wu, I-Chung Deng, Ting-Chia Chang, Sheng-Chia Lin,