Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
7151247 | Solid-State Electronics | 2011 | 9 Pages |
Abstract
In this work, a model is developed in order to obtain analytical expressions of the subthreshold characteristics of advanced Pi-gate FET transistors. Based on the solution of the 3D Laplace's equation, the interface coupling in the structure is accurately described and the potential calculated. Using the 'most leaky path' approach, the potential is then integrated and expressed as a simplified formula for the subthreshold current of Pi-gate FET transistors. The short-channel characteristics (subthreshold current, subthreshold slope, Roll-off and DIBL) are calculated and compared to experimental data with an excellent agreement, without the need of any fitting parameters. Additionally, it is shown that the proposed analytical equation for the 3D subthreshold current can be extended to a wide range of Multiple-gate FET transistors in order to study their scalability. Finally, a pseudo-compact subthreshold slope formula is proposed in order to provide simplified scaling-oriented guidelines.
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Physical Sciences and Engineering
Engineering
Electrical and Electronic Engineering
Authors
Romain Ritzenthaler, François Lime, Olivier Faynot, Sorin Cristoloveanu, Benjamin Iñiguez,