Analysis of Resource Utilization in Compositional Microprogram Control Unit with Elementary Operational Linear Chains

This paper presents results of decreasing hardware resources usage for compositional microprogram control units with code sharing and elementary operational linear chains. Two types of microprogram control units are compared: a structure with address converter and without it. For synthesis and implementation of the microprogram control unit Xilinx ISE 8.2i package was used. Four optimization strategies available in the ISE package have been applied. The test results show that for some examples memory consumption drops even by 50% in comparison to the implementation without the address converter. It's important to notice that adding an additional block (address converter) to the microprogram control unit does not cause an increase in hardware resource use.