Universal shift register implementation using quantum dot cellular automata

Quantum-dot Cellular Automata (QCA) demands to be a promising alternative of CMOS in ultra large scale circuit integration. Arithmetic and logic unit designs using QCA are of high research interest. A layout of four and eight bit universal shift register (USR) has been proposed. Initially QCA layouts of D flip-flop with clear and 4 to 1 multiplexer are designed, which are extended to design 4 and 8-bit parallel in parallel out (PIPO) shift register. Finally the PIPO is utilized to design 4-bit and 8-bit USR. By the comparative analysis it is observed that the proposed D Flip-flop achieved 40% clock delay improvement, whereas the modified layout of 4 to 1 multiplexer achieved 30% cell count reduction and 17% clock delay reduction from the previous works. This results in 31% reduction in cell count, 45% reduction in area and 55% reduction in clock cycle delay in 8 bit USR layout.