FROM SELF-TEST TO SELF-REPAIR

The principle of reconfiguring digital hardware for testing is now widely accepted. Built-in self-test is also now established technology. Self-testability can be thought of as a design objective, in a similar manner to speed, area and power. Thus high-level synthesis tools can be designed to explore a design space that includes testability and to search for optimal implementations. In this context, self-test would normally be performed off-line, but on-line test structures can also be created. Using high-level synthesis allows efficient reuse of resources for self-checking. A further design objective might be dynamic reconfiguration. By combining self-checking and self-reconfiguration, it is possible to create a fault-tolerant computing fabric. This paper describes our recent research in synthesis for self-test, self-checking, reconfiguration and self-repair.