RECONFIGURABLE LOGIC CONTROLLER FOR EMBEDDED APPLICATIONS

The design methodology of modular Logic Controllers, which are realised in reconfigurable array logic, is presented. Sequential Function Chart is considered as an initial behavioural specification of Concurrent State Machine with Data Path. SFC is supplemented with textual explanation of its guards and actions, written in Structured Text. Before a final design, it is transformed into a particular kind of modular control interpreted Petri net and described in VHDL on Register Transfer Level. The dedicated Data Path is formed from previously designed Function Blocks. Refined, structured and verified description of Reconfigurable Logic Controller is mapped directly into FPGA by means of using dedicated and commercial synthesis tools.