State assignment and logic optimization for finite state machines

An FSM synthesis for PAL-based CPLDs is presented in the paper. A new approach consisted of the original method of the state assignment and PAL-oriented multi-level optimization is proposed. The aim of the proposed heuristic method is oriented on the area minimization. Presented state assignment method takes into consideration elements of two-level minimization, while the essence of PAL-oriented multi-level optimization is to search for multi-output implicants that can be shared by several functions. Results of experiments prove the effectiveness of the method for CPLD structures consist of PAL-based logic blocks.